Category: C++

more work with esp-idf v5 and esp32-s3 c++ code

whbeebe

I’m continuing to work with the latest release of ESP-IDF. I discovered some issues with an existing ESP32-S3 application I’ve presented here in the past. I’ll outline those issues as well as how those issues were fixed. I’ll also cover continuing problems I’m still having with ESP-IDF V5.

We need to configure certain MCU attributes with idf.py menuconfig, the most important the enabling of the external SPIRAM.

Configuration

The ESP32-S3-DevKitC-1-N8R8 comes with an ESP32-S3-WROOM-1 SOC, 8 GB (N8) of flash and 8 GB (R8) of external RAM. We’re going to configure some of the properties of the devkit to tell the software tool chain how much flash is present, and to enable the use of the external RAM. To do this we’re going to use idf.py menuconfig.

  • Set the amount of flash from the default of 2 GB to 8 GB. At the top-level of menuconfig select Serial flasher config; select Flash size (2 MB); move down to 8 MB and select it, then return to the top of menuconfig.
  • Enable the external RAM. At top-level of menuconfig select Component config; scroll down and select ESP PSRAM; enable Support for external, SPI-connected RAM; move down to and select SPI RAM config; select Mode (QUAD/OCT) of SPI RAM chip in use (Quad Mode PSRAM); select Octal Mode PSRAM; step back one level (left arrow).
    • move down to Initialize SPI RAM during startup and enable it;
    • move down to Run memory test on SPI RAM initialization and enable it.
  • Press ‘Q’ key and save these changes.

With the external RAM enable, the system will find it and allow it to become part of the overall memory pool, which means you now have 8.5 MB of memory to work with.

Updated Code

The code comes from the initial ESP32-S3 code I wrote a while back that flashes an external LED and the on-board NeoPixel. I’ll speak to changes after the listing.

#include <stdio.h>#include <array>#include <cinttypes>#include "freertos/FreeRTOS.h"#include "freertos/task.h"#include "driver/gpio.h"#include "esp_log.h"#include "led_strip.h"#include "sdkconfig.h"#include "esp_system.h"#include "esp_psram.h"// Create an array of color arrays to cycle through continuously.//using std::array;const array<array<int, 3>, 7> colors {{{32,0,0},  // red{0,32,0},  // green{0,0,32},  // blue{0,32,32}, // cyan{32,0,32}, // magenta{32,16,0}, // yellow{0,0,0}// black}};static led_strip_handle_t led_strip;static void initialize_neo_pixel() {led_strip_config_t strip_config = {.strip_gpio_num = CONFIG_BLINK_GPIO,.max_leds = 1, // at least one LED on board};led_strip_rmt_config_t rmt_config = {.resolution_hz = 10000000, // 10 MHz};ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip));// Darken NeoPixel by setting individual LED values to 0//led_strip_clear(led_strip);}// Task 1.//static void task_blink_neo_pixel(void * pvParameters) {while(true) {for(auto color : colors) {led_strip_set_pixel(led_strip, 0, color[0], color[1], color[2]);led_strip_refresh(led_strip);vTaskDelay(500 / portTICK_PERIOD_MS);led_strip_clear(led_strip);vTaskDelay(500 / portTICK_PERIOD_MS);}}}// Task 2.//static void task_blink_led(void * pvParameters) {gpio_reset_pin(GPIO_NUM_46);// Set the GPIO as a push/pull output//gpio_set_direction(GPIO_NUM_46, GPIO_MODE_OUTPUT);// Task 2 endless loop.//while (true) {gpio_set_level(GPIO_NUM_46, true);   // LED onvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, false);  // LED offvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, true);   // LED onvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, false);  // LED offvTaskDelay(2700 / portTICK_PERIOD_MS);}}// Main entry.//extern "C" void app_main(void) {static const char *TAG = "DUAL_BLINK_V5";int core = xPortGetCoreID();ESP_LOGI(TAG, "BEGIN");ESP_LOGI(TAG, "ESP-IDF VERSION %s", esp_get_idf_version());ESP_LOGI(TAG, "APP_MAIN CORE %i", core);ESP_LOGI(TAG, "FREE HEAP %" PRIu32, esp_get_free_heap_size());ESP_LOGI(TAG, "INITIALIZE NEOPIXEL");initialize_neo_pixel();// Create task 1.//ESP_LOGI(TAG, "CREATE TASK 1");TaskHandle_t xHandle1 = NULL;static uint8_t ucParameterToPass1 = 1;xTaskCreate(task_blink_neo_pixel,"BlinkNeoPixel",// human readable task name.4096,   // stack size in bytes.&ucParameterToPass1,tskIDLE_PRIORITY,&xHandle1);configASSERT(xHandle1);// Create task 2.//ESP_LOGI(TAG, "CREATE TASK 2");TaskHandle_t xHandle2 = NULL;static uint8_t ucParameterToPass2 = 1;xTaskCreate(task_blink_led,"BlinkLED", // human-readable task name.4096,   // stack size in bytes.&ucParameterToPass2,tskIDLE_PRIORITY,&xHandle2);configASSERT(xHandle2);// Stay in an endless loop. Don't return from this task.//ESP_LOGI(TAG, "ENTER MAIN LOOP");while (true) {vTaskDelay(5000 / portTICK_PERIOD_MS); // 5 second period}}

The first issue I came across after enabling external RAM was with the NeoPixel blinking task. Before the external RAM was enabled, both tasks ran just fine. After, BlinkNeoPixel crashed its stack and caused the application to enter a continuous boot loop. I fixed that problem by first removing the NeoPixel initialization code and putting it into its own subroutine, which is called once to set up the NeoPixel (see lines 36 through 53). I should note that that is the way the original Espressif example code handled it. It was my decision to pull it into the NeoPixel blink task, even if it was only executed once before running in the while loop. This was a bad decision because it forces the task to consume more stack space than necessary. Once it was split apart again, there were no more stack crashes on that task. I also decided to increase the stack size on both tasks from 2048 bytes to 4096 bytes.

The second issue is with the external RAM itself. The way it’s configured is that it’s “lumped in” with the SoC’s 512K RAM, allowing regular applications to access it via malloc and free. I tried to access the memory more directly via esp_psram, but while I could write code with functions found in esp_psram, they failed to link because the psram subsystem would not build. And I couldn’t figure out how to configure my project to build that library. So I’m leaving the code as is and will move on with “normal” memory access to see what happens.

Here’s one run of the code on the idf.py monitor.

Hard resetting via RTS pin...Executing action: monitorRunning idf_monitor in directory /home/mint/Develop/esp/dualblink_v5Executing "/home/mint/.espressif/python_env/idf5.0_py3.10_env/bin/python /home/mint/Develop/esp/esp-idf-v5.0/tools/idf_monitor.py -p /dev/ttyUSB0 -b 115200 --toolchain-prefix xtensa-esp32s3-elf- --target esp32s3 /home/mint/Develop/esp/dualblink_v5/build/dualblink_v5.elf -m '/home/mint/.espressif/python_env/idf5.0_py3.10_env/bin/python' '/home/mint/Develop/esp/esp-idf-v5.0/tools/idf.py' '-p' '/dev/ttyUSB0'"...--- idf_monitor on /dev/ttyUSB0 115200 ------ Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---p_image: segment 2: paddr=0001dbb8 vaddr=40374000 size=02460h (  9312)�ESP-ROM:esp32s3-20210327Build:Mar 27 2021rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)SPIWP:0xeemode:DIO, clock div:1load:0x3fce3810,len:0x167cload:0x403c9700,len:0xbe8load:0x403cc700,len:0x2e98entry 0x403c9904I (25) boot: ESP-IDF v5.0 2nd stage bootloaderI (25) boot: compile time 21:49:42I (25) boot: chip revision: v0.1I (26) boot_comm: chip revision: 1, min. bootloader chip revision: 0I (33) boot.esp32s3: Boot SPI Speed : 80MHzI (38) boot.esp32s3: SPI Mode   : DIOI (43) boot.esp32s3: SPI Flash Size : 8MBI (48) boot: Enabling RNG early entropy source...I (53) boot: Partition Table:I (57) boot: ## LabelUsage  Type ST Offset   LengthI (64) boot:  0 nvs  WiFi data01 02 00009000 00006000I (71) boot:  1 phy_init RF data  01 01 0000f000 00001000I (79) boot:  2 factory  factory app  00 00 00010000 00100000I (86) boot: End of partition tableI (91) boot_comm: chip revision: 1, min. application chip revision: 0I (98) esp_image: segment 0: paddr=00010020 vaddr=3c020020 size=0a9b4h ( 43444) mapI (114) esp_image: segment 1: paddr=0001a9dc vaddr=3fc92d00 size=031d4h ( 12756) loadI (117) esp_image: segment 2: paddr=0001dbb8 vaddr=40374000 size=02460h (  9312) loadI (125) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=1d974h (121204) mapI (153) esp_image: segment 4: paddr=0003d99c vaddr=40376460 size=0c880h ( 51328) loadI (165) esp_image: segment 5: paddr=0004a224 vaddr=50000000 size=00010h (16) loadI (171) boot: Loaded app from partition at offset 0x10000I (172) boot: Disabling RNG early entropy source...I (185) octal_psram: vendor id: 0x0d (AP)I (185) octal_psram: dev id   : 0x02 (generation 3)I (185) octal_psram: density  : 0x03 (64 Mbit)I (190) octal_psram: good-die : 0x01 (Pass)I (195) octal_psram: Latency  : 0x01 (Fixed)I (201) octal_psram: VCC  : 0x01 (3V)I (206) octal_psram: SRF  : 0x01 (Fast Refresh)I (212) octal_psram: BurstType: 0x01 (Hybrid Wrap)I (217) octal_psram: BurstLen : 0x01 (32 Byte)I (223) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)I (229) octal_psram: DriveStrength: 0x00 (1/1)I (234) esp_psram: Found 8MB PSRAM deviceI (239) esp_psram: Speed: 40MHzI (243) cpu_start: Pro cpu up.I (247) cpu_start: Starting app cpu, entry point is 0x4037535c0x4037535c: call_start_cpu1 at /home/mint/Develop/esp/esp-idf-v5.0/components/esp_system/port/cpu_start.c:142I (0) cpu_start: App cpu up.I (984) esp_psram: SPI SRAM memory test OKI (993) cpu_start: Pro cpu start user codeI (993) cpu_start: cpu freq: 160000000 HzI (994) cpu_start: Application information:I (996) cpu_start: Project name: dualblink_v5I (1002) cpu_start: App version:  1I (1006) cpu_start: Compile time: Dec  6 2022 21:49:36I (1013) cpu_start: ELF file SHA256:  5c83520c39687425...I (1019) cpu_start: ESP-IDF:  v5.0I (1023) heap_init: Initializing. RAM available for dynamic allocation:I (1031) heap_init: At 3FC96960 len 00052DB0 (331 KiB): D/IRAMI (1037) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAMI (1044) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAMI (1050) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAMI (1057) esp_psram: Adding pool of 8192K of PSRAM memory to heap allocatorI (1065) spi_flash: detected chip: genericI (1069) spi_flash: flash io: dioI (1074) cpu_start: Starting scheduler on PRO CPU.I (0) cpu_start: Starting scheduler on APP CPU.I (1094) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocationsI (1094) DUAL_BLINK_V5: BEGINI (1104) DUAL_BLINK_V5: ESP-IDF VERSION v5.0I (1104) DUAL_BLINK_V5: APP_MAIN CORE 0I (1114) DUAL_BLINK_V5: FREE HEAP 8727288I (1114) DUAL_BLINK_V5: INITIALIZE NEOPIXELI (1124) gpio: GPIO[48]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 I (1134) DUAL_BLINK_V5: CREATE TASK 1I (1134) DUAL_BLINK_V5: CREATE TASK 2I (1134) DUAL_BLINK_V5: ENTER MAIN LOOPI (1154) gpio: GPIO[46]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0

So what’s happening during a boot?

  1. Lines 20-22 — The external RAM chip is first detected, and the size is displayed.
  2. Lines 39-51 — The external RAM chip is probed and detail information is printed.
  3. Line 71 — PSRAM is added to the full heap space.
  4. Line 80 — The initial amount of free heap is printed in bytes. This is printed by line 100 in dualblink_v5.cpp.

There’s more to come…

espressif releases esp_idf version 5

whbeebe

Espessif officially released version 5 of their ESP_IDF (IoT Development Framework) on 2 December. I’ve been spending the last two days learning how to migrate from version 4.4.3 to version 5. After a few false starts I’ve discovered a workflow that works for me.

  • First thing I do is create a new work folder in which to migrate to version 5.
  • Within that folder I recursively copy the contents of a version 5 example that most closely matches what I want to port. In my case it was underneath the examples folder, examples/get-started/blink.
  • Once copied I step into the main folder and copy the main folder source contents only of the application to be ported. Adjust the CMake file in the main folder to pick up the new source files you just copied.
  • I step out of the main folder and back into the top level migration folder
  • I perform an idf.py set-target esp32s3 or esp32c3 for the hardware I need to compile for.
  • I them start to compile the code. You’re going to get errors, so you need to keep an editor open in another console tab or within a graphical editor, and fix the source that’s causing compiler errors.
  • I managed to complete the migration in no more than three steps.
  • Once compiled, then flash the new binary to the test board and see if it works. In both of my cases so far, they have.

Here’s one of the easiest of my apps to port so far.

#include <stdio.h>#include <array>#include "freertos/FreeRTOS.h"#include "freertos/task.h"#include "driver/gpio.h"#include "esp_log.h"#include "led_strip.h"#include "sdkconfig.h"// Create an array of color arrays to cycle through continuously.//using std::array;const array<array<int, 3>, 7> colors {{{32,0,0},  // red{0,32,0},  // green{0,0,32},  // blue{0,32,32}, // cyan{32,0,32}, // magenta{32,16,0}, // yellow{0,0,0}// black}};// Task 1.//static void task_blink_neo_pixel(void * pvParameters) {// Initialized the NeoPixel.//static led_strip_handle_t led_strip;led_strip_config_t strip_config = {.strip_gpio_num = CONFIG_BLINK_GPIO,.max_leds = 1, // at least one LED on board};led_strip_rmt_config_t rmt_config = {.resolution_hz = 10000000, // 10 MHz};ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip));// Darken NeoPixel by setting individual LED values to 0//led_strip_clear(led_strip);// Task 1 endless loop.//while(true) {for(auto color : colors) {led_strip_set_pixel(led_strip, 0, color[0], color[1], color[2]);led_strip_refresh(led_strip);vTaskDelay(500 / portTICK_PERIOD_MS);led_strip_clear(led_strip);vTaskDelay(500 / portTICK_PERIOD_MS);}}}// Task 2.//static void task_blink_led(void * pvParameters) {gpio_reset_pin(GPIO_NUM_46);// Set the GPIO as a push/pull output//gpio_set_direction(GPIO_NUM_46, GPIO_MODE_OUTPUT);// Task 2 endless loop.//while (true) {gpio_set_level(GPIO_NUM_46, true);   // LED onvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, false);  // LED offvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, true);   // LED onvTaskDelay(100 / portTICK_PERIOD_MS);gpio_set_level(GPIO_NUM_46, false);  // LED offvTaskDelay(2700 / portTICK_PERIOD_MS);}}// Main entry.//extern "C" void app_main(void) {static const char *TAG = "DUAL_BLINK";int core = xPortGetCoreID();ESP_LOGI(TAG, "BEGIN");ESP_LOGI(TAG, IDF_VER);ESP_LOGI(TAG, "APP_MAIN CORE %i", core);// Create task 1.//TaskHandle_t xHandle1 = NULL;static uint8_t ucParameterToPass1 = 1;xTaskCreate(task_blink_neo_pixel,"BlinkNeoPixel",// human readable task name.2048,   // stack size in bytes.&ucParameterToPass1,tskIDLE_PRIORITY,&xHandle1);configASSERT(xHandle1);// Create task 2.//TaskHandle_t xHandle2 = NULL;static uint8_t ucParameterToPass2 = 1;xTaskCreate(task_blink_led,"BlinkLED", // human-readable task name.2048,   // stack size in bytes.&ucParameterToPass2,tskIDLE_PRIORITY,&xHandle2);configASSERT(xHandle2);// Stay in an endless loop. Don't return from this task.//while (true) {vTaskDelay(5000 / portTICK_PERIOD_MS); // 5 second period}}

The solidly highlighted section above shows what had to be changed. It looks like a lot, but it’s not. The functionality is still the same as it was in older versions, it’s how that functionality is invoked that’s changed. What I found more interesting is that none of the multitasking functionality changed. I wasn’t sure what to expect, but the changes to using the NeoPixel are rather minor, all things considered. What I’m looking forward to is if I can use the external PSRAM on all the boards. Currently I can’t with ESP_IDF 4.x.

There’s also a problem compiling Micropython with version 5. I’ve already checked and there is no support in Micropython 1.19.1 for ESP_IDF 5. I found an closed ticket in the Micropython forums talking about this and asking if anyone wanted to step forward and work on this.

Micropython Issue 8607: https://github.com/micropython/micropython/issues/8607